Monday, July 19, 2010

The Bitgrid project

I've got an idea I'm working on for a FPGA (Field Programmable Gate Array) architecture which may be just the thing needed to achieve the goal of 1 ExaFlop per second when put into a sufficiently large grid.

It's called the BitGrid, It's got a blog http://bitgrid.blogspot.com
It's a crazy idea because it goes against the grain of 30 years of FPGA design in that it has NO routing hardware, it's all logic. This removes many of the problems with trying to fit a design into a chip.
It's crazy because it wastes gates and power to route signals around.
It's crazy because you just can't program it in C++, or any other procedural language.

But....

It is fault tolerant
It's conceptually very simple and elegant
It should work to Exascale level challenges
It should be possible to make a small chip for $1.00 in quantity.
Gates not used would consume almost no power.
It's never been tried before. (I've spend a LOT of time trying to find a precedent)

I've been building simulation software as a step in getting to actually building one. The simulator is open source. http://code.google.com/p/bitgrid-sim/
So.. there it is.
What do you think?

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